Re: Thanks for the Verilog help

From: Jim Brain <brain_at_jbrain.com>
Date: Sat, 14 Dec 2013 00:05:54 -0600
Message-ID: <52ABF542.9090405@jbrain.com>
On 12/12/2013 8:01 AM, silverdr@wfmh.org.pl wrote:
> Could you post a picture somewhere?
Sure:
https://www.facebook.com/photo.php?fbid=566580610082657&set=o.173240806054235&type=1&theater

>
>>   
>> No soldering.
> Well, I am not afraid of soldering but for this kind of “RAD” approach it seems attractive for a good start.
>

Yes, these male header pins and prototype wires make breadboards less 
useful!

This, coupled with a Saleae Logic logic analyzer makes for quick work of 
debugging.  I can probably ask Arkanix to run me a handful more of those 
Min-Xpander PCBs if there is interst.  They were $2.50 a piece, as I 
recall.  The CPLD board is this one:

http://www.ebay.com/itm/Xilinx-XC9572XL-AMS-CPLD-development-learning-board-test-board-4-programm-LED-/170869820463?pt=LH_DefaultDomain_0&hash=item27c8a28c2f

Altera haters gonna hate, I guess, but I decided to learn with Xilinx.  
But, this:

http://www.ebay.com/itm/Altera-MAX-II-EPM240-CPLD-development-board-learning-board-breadboard-/310704544415?pt=LH_DefaultDomain_0&hash=item48576f1a9f

should do the same thing.

Jim

-- 
Jim Brain
brain@jbrain.com
www.jbrain.com


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