The PLL IS from the C64 which explains why we had some in the cabinet :) , It also doesn't hurt to have a working example when under that kind of time press. When locked, the 8563 ran at 14.318Mhz so we had a different set of register values to make the hfreq/hsync and vfreq/vsync times correct, the picture was wider since the dot clock was slower. We might have even dropped the display to 79 characters, I just cant be sure if that is a valid memory. The PLL not only locked to the VIC, but it gave me access to the dotclock with a known processor cycle starting point as we ran the 1.02mhz to the tower logic so we knew where we were in time compared to the 6502. From there we then controlled when signals like the /CS could toggle. At the heart of the problem was there was a window in time where if the CS is toggled during that time the 8563 WOULD fail, again no synchronization protection and there were at least two windows in time where the CS going low at a bad time compared to the "16MHZ" would crap the cycle. When the dotclock was at 16mhz and the VIC was a 14.31, then the signal would end up in the danger zone 1.6 million times a second, in other words 100% chance of failure. Picture an oscilloscope locked to 16mhz on one channel and then 14.318 on the other channel it would look like a smear which is the heart of asynchronicity. As it turned out, if we just hooked the 14.318mhz directly to the 8563 it crashed immediately as the danger window is very close to the natural edge of the 14.318/1.02 transition, the "dwell" then delayed the clock by 69ns per tap of the shift register. It was an interesting moment as we tried the first tap which failed, then the second tap failed slower, then the third tap and it cautiously looked like it stopped failing. At that point I was a bit punchy from a 20 hour day and didn't trust myself to declare it "fixed" so I had DiOrio put it through its paces while I just kind of stood and drooled all over the floor. When the Z80 crashed the 8563 in CPM mode we just moved the wire one more tap as if we knew what we were doing. Bil -----Original Message----- From: email@example.com [mailto:firstname.lastname@example.org] On Behalf Of Gerrit Heitsch Sent: Saturday, November 23, 2013 5:56 AM To: email@example.com Subject: Re: Question On 11/23/2013 10:08 AM, Bil Herd wrote: > I gave a description of the problem also. > > http://c128.com/phase-locking-vdc-vic-chip-short-version 74LS629 and MC4044P, where have we seen those before...? ;) Looks like you took the PLL from the C64 and modified it. With this board in place, is the 8563 still running at 16MHz or getting slightly overclocked to use 16x CPU-Clock (1.02 MHz?)? BTW: The 74LS629 is still easily available, but the MC4044P is getting hard to find. Gerrit > > > -----Original Message----- > From: firstname.lastname@example.org > [mailto:email@example.com] On Behalf Of Gerrit Heitsch > Sent: Saturday, November 23, 2013 2:06 AM > To: firstname.lastname@example.org > Subject: Re: Question > > On 11/23/2013 07:01 AM, Bil Herd wrote: >> Just curious; do things that don't really exist or have a name or >> number have any value in the eyes of collectors? I just found the 3" >> square PCB that saved the 85 CES show by phase locking the 8563 VDC >> to > the VIC chip. >> The PCB cost $1200 of 1985 dollars as it was same day turn. >> >> I laughed out loud when I found it. > > Could you post a photo somewhere? > > Gerrit > > > > Message was sent through the cbm-hackers mailing list > > Message was sent through the cbm-hackers mailing list > > Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2013-11-23 17:00:06
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