Re: 6530 replacement

Hi all,

On 2013/10/08 10:14 am, Gerrit Heitsch wrote:
> On 10/08/2013 07:03 PM, Gerrit Heitsch wrote:
>> On 10/08/2013 06:31 PM, Ruud@Baltissen.org wrote:
>>> Hallo allemaal,

Just out of curiosity, Ruud, what does "allemaal" translate as? I'm 
guessing it's some variation on "all of you", but I don't actually know, 
and I don't trust automated web translators to give a colloquially 
accurate translation.

>>> I designed and built a 6530 replacement, please see:
>>> 
>>>    http://www.baltissen.org/newhtm/6530repl.htm
>>> 
>>> The problem: it doesn't work :( I get five blinks on my 8250LP,
>>> meaning: error zero page RAM 6530. Please have a look at the
>>> schematic and maybe you can see if I am overlooking something. Many
>>> thanks!

A very awesome project. Wasn't somebody else doing something similar? 
Wolfgang somebody, IIRC. I am highly interested because I've been 
wrestling with doing a complete 6530 reimplementation in a nonvolatile 
FPGA. (My inexperience with VHDL is slowing me down a bit. Thank 
goodness for good reference works.)

>> Unless I'm reading the datasheet for the 6530 wrong, you also need 
>> _RSO
>> to select the RAM which will cover some parts of the ROM [...]
> 
> Ok... Forget that part with RAM, I did misread the data sheet, but
> while the datasheet is unclear in some respects, to me it looks like
> you need to have RS0 = HIGH to read the ROM and LOW for RAM and I/O.
> Your circuit has that inverted.

There are five pins which can potentially be involved in addressing 
various functional units within the 6530. Which are used and whether 
they need to be HIGH or LOW is mask-programmable, though fortunately all 
of the Commodore disk drives used the same mask options. Based on a very 
nice memory map of the 4040 drive which, IIRC, someone posted to this 
list a few months ago, here is the schematic reduction:

           RAM Select         I/O / Timer Select      ROM Select
             (AND)                  (AND)               (AND)
         | | | | | | |          | | | | | | |           | | |
  /CS1 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-----------+-+-+-
   CS1 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-----------+-+-+-
         | | | | | | |          | | | | | | |           | | |
  /CS2 --X-+-+-+-+-+-+----------X-+-+-+-+-+-+-----------+-+-+-
   CS2 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-----------X-+-+-
         | | | | | | |          | | | | | | |           | | |
  /RS0 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-----------+-+-X-
   RS0 --+-+-X-+-+-+-+----------+-+-X-+-+-+-+-----------+-+-+-
         | | | | | | |          | | | | | | |
    A9 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-
   /A9 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-
         | | | | | | |          | | | | | | |
    A8 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-
   /A8 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-
         | | | | | | |          | | | | | | |
    A7 --+-+-+-+-+-+-+----------+-+-+-+-X-+-+-
   /A7 --+-+-+-+-X-+-+----------+-+-+-+-+-+-+-
         | | | | | | |          | | | | | | |
    A6 --+-+-+-+-+-+-+----------+-+-+-+-+-+-+-
   /A6 --+-+-+-+-+-+-X----------+-+-+-+-+-+-X-

RAM Select: /CS2 & RS0 & /A7 & /A6

IOT Select: /CS2 & RS0 & A7 & /A6

ROM Select: CS2 & /RS0

If anyone can affirm that there is an inaccuracy here I would be very 
interested to hear about it.

-- 
Gordon Steemson
Seattle Retro-Computing Society's Agitator-in-Chief
http://www.seattleretrocomputing.com/


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