Re: Fast serial interrogation timing question

From: Nate Lawson <>
Date: Tue, 20 Aug 2013 23:22:38 -0700
Message-Id: <>
On Aug 20, 2013, at 7:52 PM, Jim Brain <> wrote:

> On 8/20/2013 5:09 PM, Ingo Korb wrote:
>> Jim Brain <> writes:
>>> Does anyone have any thoughts on why the "can you do fast serial"
>>> interrogation happens even before ATN falls on the C128/C128D/DCR?
>> The part that happens before ATN isn't an interrogation, it's just an
>> announcement that the computer is fast serial-capable. The drive is
>> still addressed using slow serial for all ATN "command bytes" and when
>> it determines that it is addressed and should act as a listener, it
>> responds with a single fast serial byte to signal to the computer that
>> it can use fast serial. If the drive is addressed as a talker, it just
>> sends data via fast instead of slow serial.
>> -ik
> My terminology might be incorrect, but my question remains the same.  Why send the byte before ATN goes low?  It's non data information (maybe not a command, but it is capability information, not data), so it should be sent while ATN is low.

Is the reason because of the strict time requirement on answering ATN? Is there enough time to register the fast serial data before ATN ack if ATN went low before the fast serial data? That may have required a more complex circuit or hurt backwards compatibility. 

I haven't reviewed this protocol, just curious. 

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Received on 2013-08-21 07:00:06

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