On 07/07/2013 06:45 PM, firstname.lastname@example.org wrote: > > On 2013-07-07, at 16:31, Gerrit Heitsch wrote: > >>> I think I have this KU photo from you already (1894x953 px) >>> >>>> As for the raster... so far all boards I had use a raster based on 1/10th" (2.54mm), not only between pins, but also between ICs. >>> >>> I mean the ROM chips placement raster. >> >> So do I... The later boards have 2 ROMs spaced apart 5,08mm (You can put one extra component hole between them. Between ROM and CIA, you have 7,62mm (3/10th") space (space for 2 extra component holes). The ROMs are twice that wide (15,24mm or 6/10th") > > This methodology is a bit "overengineered" to me ;-) What counts is actually the distance from pin 1 of one of the chips to pin 1 of the adjacent chip. This way we don't need to involve any arithmetics. Still, it's nice to make sure to understand the methology behind it, calculate it and then check if it is correct. >> Just checked on the KU, there you have space for 3 pins between the ROMs, making it 10,16mm. So a ROM is 15,24mm wide, the space between them is 10,16mm which will give you 25.4mm between Pin 1 of 2 ROMs. That would be 1". > > If you have a caliper, could you please just measure the distance from pin 1 to pin 1? I am somewhat anxious with this calculated 1.0" Still comes out to 1"... I used a tape measure. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2013-07-07 17:02:27
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