On 6/3/2013 8:32 PM, Jim Brain wrote: > On 5/30/2013 1:55 AM, Gerrit Heitsch wrote: >> On 05/30/2013 08:22 AM, Jim Brain wrote: >>> Speaking (writing) of bank registers, anyone know of a TTL option that >>> has a falling edge trigger? Yes, I can do an inverter, but would >>> rather >>> not. Use case is VIC-20, which won't work on rising edge of Phi, >>> because not all of the data is valid on rising edge. >> >> The 74LS373 or 74LS573 does that. But it's a latch, not a register. >> They use it in the C64 to de-multiplex the VIC address so it can >> access the char ROM. Trigger is the falling edge of _RAS. >> >> Now you have to check if a latch works in your case. > > A latch (in general) would work in this case, as the outputs don't > need to be valid until PHI2 goes high again, which would be 500nS later. > > Thus, I appreciate the suggestion. But, as I look at replacing, I > realize I forgot the latch needs an enable line as well. Neither of > those offer one. > > I'm trying to create a "register" at Address 38920 (on the VIC) to > hold the FLASH ROM bank. I have 38920 decoded as active low, and then > an inverted PHI into the CLK line of a '173 is latching the bank. > But, I'd rather use a single IC solution. My apologies for following up to my own post, but I thought a schematic might help. As I look at it, I can;t help but wonder if some juggling of the address lines and such would simplify things and remove the requirement for an inverter altogether, but I am not seeing an easy way to do it. http://jbrain.com/vicug/gallery/vicmidi/VIC_MIDI_Schematic Message was sent through the cbm-hackers mailing listReceived on 2013-06-04 03:01:38
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