Re: My ColourPET Project

From: Steve Gray <sjgray_at_rogers.com>
Date: Fri, 12 Apr 2013 09:20:16 -0400
Message-Id: <EFB839C4-3506-4133-82AA-AD981F10D5C0@rogers.com>
The same trick commodore used to go from 40 to 80 columns would have to be used again for colour. Two bytes are read in parallel and latched. This overcomes the memory bandwidth because you are effectively doubling the bandwidth to 16 bits. So, for 80 column colour you are doubling it again to 32 bits. Four bytes are read at the same time. 

Dual-port ram is not needed because we don't have two separate un-syncronized read or write accesses to the same memory. The cpu and the crtc do not access ram at the same time, they access on alternate clock cycles.

Steve


On Apr 12, 2013, at 2:14 AM, Nils Eilers <nils.eilers@gmx.de> wrote:

>> I was hoping to do an 80 column version eventually, but I was basically
>> going to duplicate the existing ram circuits (odd and even) as my colour
>> ram and map them into $8800-8FFF. So basically the CRTC controller would
>> read all 4  video ram blocks at once.
> That's impossible due the lack of bandwidth. You cannot read the required number of bytes at a time with the given number of memory buses. André described it here: http://www.6502.org/users/andre/petindex/crtc.html#8032
> 
>> I'm not sure I understand how
>> dual-port ram would work in this situation.
> A dual-port RAM is basically just a normal static RAM: address lines, data lines, chip enable, read/write: http://www.datasheetcatalog.org/datasheet/idt/7132_DS_37556.pdf
> What makes a dual-port RAM a dual-port RAM is having two instead of one memory bus. You've got two sets of address and data lines that are completely independent but share the same amount of memory inside.
> This is the solution to the lack of bandwidth: connect one port to the CPU and map this 2K to where you'd like to have your color RAM. Connect the other port to the CRTC, addressed by the video RAM addresses but shift the address lines by one: A0 (CRTC) --> A1 (RAM), A1 (CRTC) --> A2 (RAM) and so on. Connect the line that selects the even/odd latch as A0 (RAM).
> 
> On the downside, this 80 columns color patch requires a lot more wires than the 40 columns version ;-)
> 
> Nils
> 
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Received on 2013-04-12 14:00:11

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