Re: 8501 datasheet / information is wanted :)

From: Hegedűs István <>
Date: Mon, 4 Feb 2013 11:02:11 +0100
Message-ID: <>

Zimmers have a 7501 datasheet and I think that is the only available doc for 
this CPU. It has the pinout and timing requirements which should be enough 
(rest you can get from 6510 sheet).
If I were you, I would use an FPGA with a soft 6502 core instead. It won't 
die easily and your 8501s can save the life of other plus/4s or C16s. Don't 
waste them.


-----Original Message----- 
From: Gábor Lénárt
Sent: Sunday, February 03, 2013 10:48 PM
Subject: Re: 8501 datasheet / information is wanted :)

On Sun, Feb 03, 2013 at 07:50:22PM +0100, Gerrit Heitsch wrote:
> >The test circuit has UM6502 currently, so
> >some modification is needed, I guess (I even don't know if 8501 needs two
> >phase clock or not, etc).
> The 8501 needs only PHI0. But, in order for R/_W to  work properly,
> you also need to supply a clock signal to the GATE IN pin. In the
> C16, they use the MUX-signal for that.

Ouch, that's new for me, I mean "gate in". Is there any information how can
I use that? I am more or less familiar with the 6502 method of handling bus,
I mean PHI2, R/W, but I feel lost now with "gate in". Probably better to
stay with UM6502 for me, it seems ... There are tons of tips for that for
creating a minimal 6502 based system, and not so much worth just for an
on-CPU I/O port, which was the reason I've started to think on this.

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Received on 2013-02-04 11:00:04

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