Re: Designing the Ulti(mate) MAX cartridge

From: Gerrit Heitsch <>
Date: Wed, 19 Dec 2012 18:47:07 +0100
Message-ID: <>
On 12/19/2012 05:55 PM, Rob Clarke wrote:
> Q) When a 6510 is reset, what’s the default state of the DDR and I/O ports?

I would be surprised if it wasn't input since that's the only safe state 
at power up/reset.

> The answer I am hoping for is that they are set for input so that I could
> have a pull-up resistor on /OE up to disable the latch outputs and rely on
> the pull-ups on the address lines to bank in the correct menu image when

That's about what happens in the C64. There the 3 control lines going 
from the CPU port to the PLA, _LORAM, _HIRAM and _CHAREN have 3.3KOhm 

As for a latch, you might want to take a look at the '273. This one has 
a _CLEAR input with which you can reset all latches to LOW upon Reset 
and get your defined state.


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Received on 2012-12-19 18:00:48

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