Re: ROMs replacement

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Tue, 09 Oct 2012 20:02:54 +0200
Message-ID: <507466CE.4050606@laosinh.s.bawue.de>
On 10/09/2012 07:02 PM, silverdr@wfmh.org.pl wrote:
>
>
>> tAcc of an EPROM is the delay needed for the input signals to filter through the decoder, memory matrix and output drivers. (Assuming _CE and _OE are LOW)
>
> Does it have some sort of pipelining or does it have to deliver the data first, before reading next address? In other words for the scenario as above point [5.] is reached only after two tACCs (at most) or can it be like 1.1 tACC assuming that the last bits changed at 0.1 tACC?

There is no pipelining, it's just signals filtering through the 
different parts and taking a certain amount of time for it.

If you want you can build your own small ROM (8 Bytes). You only need a 
74LS138, a handful of 1N4148 and a 74LS244. The  LS138 is the decoder 
that selects the row, its inputs are the address lines, the LS244 is the 
output buffer (what you control with _OE), its 8 inputs connected to the 
columns which are also pulled high by weak pullups. The outputs of the 
LS138 and the inputs of the LS244 produce a 8 x 8 matrix. If you want a 
position to be read as ZERO, you put a diode there (ring towards the 
LS138), if you want a ONE, you leave the position empty. _OE are the 2 
'G' inputs of the LS244, _CS is one of the enable inputs of the LS138. 
Which then will also show you the difference between _CS and _OE in the 
timing. (*)

This little circuit, even if you build it only in your mind, should give 
you an idea how a ROM works and why you can change the input signals at 
any time and where tAcc comes from.

Any change to an input pin will take tAcc before the change appears on 
the output pins.

(*) For _CS and _OE to behave correctly, one would need an OR gate so 
that _CS HIGH also disables the output drivers, no matter what state _OE 
is in.


>> The interesting signal would be to trigger on _CS going low and display PHI0 and one of the data lines and see where the EPROM output changes state and what happens before and after.
>
> Yes.. wondering.. maybe you could quickly wire this circuit on a breakout board (should be less than half hour) and check how it behaves on your side?

I can look into it, but it will take some time since I don't have the 
time during the week and this weekend is also already full. Also, I know 
I have most parts, I'm not sure about the sockets.

  Gerrit



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