Re: GAL vs CPLD

From: didier derny <didier_at_aida.org>
Date: Tue, 18 Sep 2012 09:15:27 +0200
Message-ID: <50581F8F.8090902@aida.org>
Hi

On 18/09/2012 07:40, Baltissen wrote:
> Hallo Didier,
>
>
>> GAL 22V10-15LPN               DIP24   8.20 Euro
>> CPLD MAX7000 EPM7032 LC44-15  PLCC44  3.20 Euro
>
>> Is the -15 the speed of the component ?
> Indeed, for both.
for the speed I guessed but I was not sure.
>   
>> Are they replaceable by each other ?
> No, they are certainly not pincompatible.
>
I know that they are bot pin compatible
my question should have been:

can I do with a CPLD all I can do with a GAL ?
>> Any idea on the difference ?
> This GAL has 20 usuable pins, partly only input, partly I/O. The MAX
> more then 32, mostly I/O (IIRC).
>
> The GAL with its DIP can be removed easier out of its socket whem to be
> (re)programmed then the MAX. OTOH the S-version should have JTAG and is
> in circuit programmable.
>
I have everything to program the altera CPLD, nothing for the GAL
>> but I need an address decoding external to the CPLD
>> (to reduce the number of io used on the cpld)
> Please explain, this doen't make sense. Unless you need more glue logic
> than your CPLD can provide.
>
I'm making a board with ram + eeprom
the ram will use from 32K from $2000
the eprom will use the rest to $FFEF

I'm thinking to place a register around $1720 to select a "page" in the ram
so I can switch between several pages of 32k

($FFF0 to $FFFF will wrap to kim rom) I'm think to place a jumper to have
the interrupt vector in the new eprom or in the original rom

I also wanted a prototype  area to do some experiment with the CPLD....


actually on the main cpld, I have
- 12 bits of address A15-A4  (for the register and the exclusion in 
$FFF0-$FFFF
-   8 bits of data  for the register and experiment
-   4 bits for the selection of the page in ram
-   1 bit  den signal
-   1 bit cs for sram
-   1 bit cs for eprom
-   1 bit used but I dont remember for what :(

the MAX7064S has 36 I/O but 4 are reserved for JTAG
4 are input only clr/oe1/oe2/clk

the main use of the I/O on the cpld are for the vector wrapping
and the address of the page register for the ram

so I was thinking to save 8 bits for my experiments by decoding
the register address and the $FFF0 by external chips.


>> but no idea on how to program them
> For about $40 you can buy the TOP853:
> http://www.ebay.com/itm/top853-USB-universal-programmer-EPROM-MCU-GAL-PI
> C-/160378432470
> Just picked the first hit on Google. Mine came with a PLCC44-to-DIP40
> adapter.
>
>
>> (I thought a second CPLD would be too expensive)
> Cheaper than a GAL, more flexible than LS. But then what about a bigger
> CPLD?
>
bigger CPLD are more expensive...
7032 3.2 euro
7064 10  euro
7128 25  euro
>> What is best GAL or CPLD ?
> IMHO this depends on the availability of the parts and the price.
>
>
> --
>       ___
>      / __|__
>     / /  |_/     Groetjes, Ruud Baltissen
>     \ \__|_\
>      \___|       http://Ruud.C64.org
>
>
>    
>
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Received on 2012-09-18 08:00:28

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