Re: FPGA implementation of (bits of) the CBM2 8088 coprocessor in VHDL

Date: Sun, 29 Apr 2012 21:26:42 +0200
Message-ID: <30396851.48201335727602076.JavaMail.www@wwinf3701>
I have a "first cut" of some VHDL for the CBM2 8088 coprocessor card if anyone is interested in a copy.

I have implemented the 'glue' logic (the 74LSxxx) chips - with the exception of the bus drivers of course which you will probably still 

I have also implemented a "MODE 0" implementation of the 6525 (as I believe this is how it is used by the on-board ROM).

I have also included a VHDL implementation of the ROM (U14) if anyone wants to incorporate more into their silicon!

All this is (of course) untested - but it synthesises for a XILINX CPLD (Glue and 6525) and a SPARTAN 3E (ROM using Block RAM).

If anyone would like a copy - PM me and I will forward you a ZIPped file. All constructive comments gratefully received to improve the 

I will work on a "MODE 1" enhancement for the 6525 and look at the 6526 in the meantime.

If anyone knows of the whereabouts of an open source VHDL implementation of the 8284, 8288 and 8259 I would be interested if you could 
point me in the direction of them.



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Received on 2012-04-29 20:00:10

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