Re: CPU-Replacement for die 264 series?

From: Gerrit Heitsch <>
Date: Sat, 24 Mar 2012 19:03:43 +0100
Message-ID: <>
On 03/24/2012 06:40 PM, Jim Brain wrote:
> On 3/24/2012 10:43 AM, Gerrit Heitsch wrote:
>> I did a bit of side by side comparision (see below). The only signal I
>> have a bit of a problem with is how 'Gate In' influences R/_W:
>> From the TED system manual:
>> R/_W is latched by the Gate In line to synchronize between a DRAM
>> memory cycle and the processor clock cycle. If AEC is low when Gate In
>> makes a low to high transition, the R/_W line will go to a high
>> impedance state until the next transition of Gate In and AEC is high
>> prior to the transition.
>> It shouldn't be difficult to make that work, but so far I haven't been
>> able to come up with a small and simple circuit for it. It would be
>> nice if 2 TTL chips were enough.
> I think life would be simpler with a small GAL/CPLD and a 6502. As much
> as there are plenty of 6510s around in 64s, I hate to rob them out of
> units that might be fixable.

Well, it's a choice... I do have a few spare 6510s and you can find a 
lot of C64 with busted cases and/or keyboards.

> A CPLD at least would be able to provide 8 bits of IO and the GATE_IN
> functionality.

It would also have to provide the tristate functionality for the address 
bus since the original 6502 doesn't have that.


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Received on 2012-03-24 19:00:14

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