I pulled the schematics and your question makes sense, especially compared to A7 and ('258 inverts to match /VA14 , /VA15) I am going to go out on a limb and think that A6 doesn't really multiplex in the middle of the cycle, they may have meant that sometimes it is high, but I don't think they meant it to be a true VMA6 in the middle of a VIC bus access cycle. I say this because of the way it was treated in the C128 according to my notes (okay the C128 Prog Reference Guide but they are essentially my working notes in the hardware section), it was treated as a true static A6 along with A7. Also I gate A6 and A7 together going into the MMU on the C128 which I wouldn't do if one had a time of invalidity during important times and /RAS/MUX were pretty important time slots, for noise if nothing else. It would also be a little ugly to flip the mux on the 258 at the same time the VIC chip is flipping the address, which is part of your question. Too ugly for no reason I think. So even though I am talking about the C128's version of the VIC I don't recall that we changed A6 as part of the conversion. I am not saying it didn't happen, but I am saying that there is enough pieces that point towards it being a static address that it might be worthwhile to scope it and see if the information was either a typo or misinterpreted by the writers. If all of that fails the final answer would be that the chip came first and the design came second and not everything got pushed back into the chip. I could also relate whole diatribe about DRAMs in general and the push and pull that came from fear and misunderstanding the problems when I first got there. Bil -----Original Message----- From: firstname.lastname@example.org [mailto:email@example.com] On Behalf Of Gerrit Heitsch Sent: Friday, February 17, 2012 11:48 AM To: firstname.lastname@example.org Subject: Re: Strange address line on VIC-II On 02/17/2012 08:18 AM, Bil Herd wrote: > Without getting out the schematic I would say that the VIC addresses > on the bus are also a function of the BA line and so has a tristate > state in addition to the driven state where the processor is active. > During Tristate the A6 line comes from the processor and so still > needs to go through the MUX "normally". If A6 wasn't needed by the > VIC then it would make "clean" sense to drive it as floating would be > disastrous and a weak pullup really doesn't work at speeds as it would > have to go from driven low to floating high in time for /RAS, > meanwhile when it floats through the linear region of the MUX's they might "sing". Well, the thing is, this address line doesn't need to be tristate, that part is handled by the 74LS258. Also, the rest of the C64 handles A7 (the line that is not multiplexed) the same as A6 (the line that is multiplexed with '1'). The moment the '1' appears on the pin, the 74LS258 will have switched to the address bits generated by the CIA. In other words, the A6 line could have been made to behave like A7 but wasn't and at least the circuit of the C64 doesn't give any hint about the 'why'. Gerrit Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2012-02-17 18:00:32
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