Without getting out the schematic I would say that the VIC addresses on the bus are also a function of the BA line and so has a tristate state in addition to the driven state where the processor is active. During Tristate the A6 line comes from the processor and so still needs to go through the MUX "normally". If A6 wasn't needed by the VIC then it would make "clean" sense to drive it as floating would be disastrous and a weak pullup really doesn't work at speeds as it would have to go from driven low to floating high in time for /RAS, meanwhile when it floats through the linear region of the MUX's they might "sing". Actually you don't have to think of it as being driven high, it's driven to the correct address for VIC operation which turns out to always be a "1". :) -----Original Message----- From: firstname.lastname@example.org [mailto:email@example.com] On Behalf Of Gerrit Heitsch Sent: Thursday, February 16, 2012 12:15 PM To: firstname.lastname@example.org Subject: Strange address line on VIC-II Hello, the address lines on VIC-II as used in the C64 are a mix of multiplexed (A0-A5/A8-A13) and static (A7-A11). That's easy enough to explain from the way the memory is set up. But then there is A6 which is, according to the datasheet, multiplexed with a static '1'. From the schematics that doesn't make any sense since it's routed through the 74LS258 just like A7 and as soon as A6 switches to a static '1' the 74LS258 switches too and the 2 address bits supplied by the CIA are valid. Is there a known reason why it was designed that way? Was it maybe used in the CBM-II series in some way? Gerrit Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2012-02-17 08:00:16
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