Re: Disabling memory refresh in UltiMax mode Re: 6510 handling of $00 and $01 registers

From: Segher Boessenkool <>
Date: Fri, 9 Dec 2011 21:54:15 +0100
Message-Id: <>
> Excellent fun!  It sees if the light pen interrupt can be triggered
> between raster lines x'136 and 2; if so, it's a 6569R1, if not, not.

Looking at the die pictures (6569R1 and 8565R2), the only difference
I see is that the 6569R1 triggers ILP on the rising edge of the
(cooked) LP input, while the newer chip is level triggered.  The
cooking is the same for both: it outputs a single ~250ns pulse when
the LP pin is asserted for the first time in a frame (except the first
1us cycle I think?)

Anyway, the way that extra edge detect on the 6569R1 is implemented
is buggy: it can only trigger during the second half of any 1us cycle.

The test does:

Clear ILP, wait for raster line 0x136;
Set the LP line (via the CIAs);
If that set ILP, it's not a 6569R1;
Wait for raster line 2;
If ILP is set now, it is a 6569R1.

So it seems that the pulse you get from triggering the LP input (via
the CIAs) is always missed on the 6569R1, and the pulse from having
it enabled when a new frame starts is always recognised.  Or  
something :-)

Either way, the 6569R1 light pen circuit would fail to trigger the
interrupt correctly; the test is detecting this bug.


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Received on 2011-12-09 21:00:08

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