Re: PET 2001 fix Part 3 - RAM/ROM board etc.

From: MikeS <dm561_at_torfree.net>
Date: Sun, 22 May 2011 11:52:29 -0400
Message-ID: <DD2B6A44EE754ED58464B0B936FF566B@vl420mt>
----- Original Message ----- 
From: ""André Fachat"" <afachat@gmx.de>
To: <cbm-hackers@musoftware.de>
Sent: Sunday, May 22, 2011 6:43 AM
Subject: Re: PET 2001 fix Part 3 - RAM/ROM board etc.


> Here (C9 pin 8, as well as pin9) it would be interesting to see where zero
> potential is. Both signals show a slower delay when going down, with a
> noticeable slope, compared to the working PET. The question is what do the
> receivers of that signal see. At what voltage level does the slope start?
> If that voltage is high enough, the receivers may see a delayed or spiked
> signal. Note the reason for the slope could be a weak driver in C9, but
> also strong pulls from aging receivers on that line (although, as the
> slope appears even in the unconnected pin 9, C9 may be the cause).
-------
When we started this I noticed that pulling C9-9 high in a working PET 
replicated Philip's symptoms (even though it's not connected to anything) so 
I also suspect C9.

Philip and I have spent a little time privately getting his scope and probes
set up so we could look at the signals and especially the baseline voltages
on pins 8,9 and 10; looks like he's finally got everything adjusted and
connected properly and they do inded look a little suspicious.

A word of caution: don't sub the 'LS93. Not only are its power pins
non-standard, but different versions have a different pinout.

******************************************************
>
> I support Ruud's question " about D5 pin 9 and E6 pin 23"?
>
> You seem to have two probes (to display old and new PETs on one screen).
> Do you have a decent trigger on the 'scope? Then you could trigger on
> DIS.ON going high (i.e. start of a raster line), and look for example at
> the address line signals. With a time base of 1us/cm you can see each
> cycle, and should easily see for example A0 (D5 pin 5) staying low 2us as
> the screen display suggests - or going high after 1us and going back
> possibly due to a spike in DIS.ON connected to the reset line of the D5
> flipflop. You should be able to get a stable trigger on DIS.ON even if is
> has a spike if you vary the trigger voltage - but not getting a stable
> trigger is one more indicator for a spike problem on DIS.ON.
>
> André
>
>
>
> -------- Original-Nachricht --------
>> Datum: Sun, 22 May 2011 16:28:28 +0900
>> Von: Philip Lord <random6000@mac.com>
>> An: cbm-hackers@musoftware.de
>> Betreff: Re: PET 2001 fix Part 3 - RAM/ROM board etc.
>
>> So I've busted out the old scope that was given to me many years ago.
>> I've
>> never used a scope before, so with the help of MikeS I think I have it
>> somewhat calibrated.
>>
>> I've posted some videos showing the working board (top) compared to the
>> non-working board (bottom). Presently I have only tested C5 pin 5, C9 pin
>> 8,
>> 9 and 11.
>>
>> I've posted video's here again:
>>
>> http://web.me.com/lord_philip/other_computers/20012.html
>>
>> Phil
>>
>>
>>
>>
>> On May 21, 2011, at 11:45 AM, Philip Lord wrote:
>>
>> > Ok...I looked at the archived list here:
>> > http://www.softwolves.com/arkiv/cbm-hackers/15/date.html
>> > ...and found the message I missed (very strange indeed).
>> >
>> > Here they are if others have also missed them:
>> >
>> >
>> > I admit I have to speculate a bit. The schematics of the PET clearly
>> remind me of what's going on inside the 6545 (see for example here
>> http://www.6502.org/users/andre/hwinfo/crtc/internals/index.html
>> > where I've analyzed the CRTC internals). I immediately recognized the
>> 74100 as the feedback register ... the purpose of this register is to
>> store
>> the memory address of the first character in the line.
>> >
>> > While displaying a line, the video circuitry first loads this memory
>> address into the registers D6/D7, which get incremented every cycle. When
>> 40
>> characters are shown, the "DIS ON" (from C5 in the horizontal timing
>> circuitry) signals goes off, but the counter still counts on.
>> >
>> > The counter is reloaded with the DIS ON signal. I.e. every time a new
>> raster line starts, the memory address counter is loaded new from the
>> 74100
>> latch. If the latch would not be reloaded, the screen would show a single
>> line over and over.
>> >
>> > The characters are made by using the same memory address, but selecting
>> different raster lines addresses in the character ROM A2.
>> >
>> > Only if the three raster line counters (output of A1, input into the A2
>> 6540 charrom) are all ones (7 = last rasterline of a character), AND the
>> DIS ON signal is on (not sure about the exact timing though) the buffer
>> 74100
>> is loaded with the next address (triggered via the C7 NAND - shown as OR
>> with inverted inputs) - the last character address in the current line +
>> 1,
>> which is the first address in the following character line. This is how
>> lines are counted in memory.
>> >
>> > In the current problem we see the following:
>> > - the character lines still show 40 characters
>> > - For each line, the character address is advanced only 36 characters.
>> So the 4 last characters of a line are (somewhat) repeated in the first 4
>> characters of the next line
>> > - It seems the first character of each line is repeated
>> > - This happens per character line, not per raster line
>> >
>> > So the memory map in screen coordinates would be:
>> >
>> > 0  0  1  2  3  4  5  6 .... 35 36 37 38
>> > 36 36 37 38 39 ...
>> > 72 72 73 74 ...
>> >
>> > As I said this happens per character line, which is interesting, as the
>> "mixup" of memory addresses must happen each raster line.
>> >
>> > Now I see that the 74100 and D6/D7 counters actually loads the _upper_
>> > 8
>> bits of the 10 bits video memory address. The lower two bits are handled
>> by the D5 dual-JK-flipflop and the following multiplexer at D2.
>> >
>> > Looking at the fact that the lower two bits show a strange behaviour in
>> the memory map:
>> >
>> > 00 00 01 10 11 00 ...
>> > 00 00 01 10 11 00 ...
>> >
>> > my assumption is there is a spike in the DIS.ON line within one cycle
>> after it becomes active that clears the lower two address bits (so the
>> "00"
>> is repeated). This would also explain the 36 character line length. Due
>> to
>> the repeat of the first cycle, the last character of a line has an
>> address
>> of 38, the one after that (which is stored in the latch(!)) has 39, which
>> is
>> binary 0000100111. Of that the upper 8 bits are stored in the latch for
>> the next line, and the lower two (in the D5 flipflops) are cleared (as
>> they
>> are always 0 at the start of the line for 40 chars/line). So after
>> clearing
>> the lowest two bits is 00100100 = 36 - the starting memory location for
>> the
>> next line!
>> >
>> > So the summary is: look for a spike in the DIS.ON signal. Maybe even
>> > try
>> to suppress it (temporarly) with a small capacitor to ground to see if
>> the
>> problem goes away.
>> >
>> > Why it is there I don't know. The signal is being produced by C5, a
>> 74LS107.
>> >
>> > Hope this helps
>> > André
>> >
>> > ____
>> >
>> > Excellent analysis!
>> >
>> > I'd also gotten to the point of suspecting the DIS ON signal that loads
>> the
>> > latches and especially D5 since it holds the two low bits, but it
>> > hadn't
>> > occurred to me that the first character is at offset 39 instead of 40
>> and
>> > that resetting D5 effectively subtracts 3; brilliant!
>> >
>> > I was also trying (unsuccessfully) to find some logical fault that
>> > would
>> > create an extra pulse on DIS ON, but maybe it is just a spike as you
>> > suggest.
>> >
>> > It would be nice to know for what diagnostic procedure the TPs are
>> > intended...
>> >
>> > Time for Philip to get out his 'scope and look at C5 pin5 (and compare
>> to
>> > the good PET).
>> >
>> > m
>> >
>> >
>> >
>> >
>> >
>> > On May 21, 2011, at 8:31 AM, Philip Lord wrote:
>> >
>> >> Hi again,
>> >> It seems that I've haven't gotten a couple of emails in this thread.
>> They contain the messages:
>> >>
>> >> "Excellent analysis!"
>> >>
>> >> and
>> >>
>> >> "So the summary is: look for a spike in the DIS.ON signal. Maybe even
>> try
>> >> to suppress it (temporarly) with a small capacitor to ground to see if
>> the
>> >> problem goes away."
>> >>
>> >> Sorry, I'm not sure who these mails came from, but unfortunately I
>> never received them and only know of their existence from the response
>> from
>> André. Can someone send please forward the missing mails.
>> >>
>> >> Thanks again
>> >>
>> >> Phil
>> >>
>> >>
>> >> On May 21, 2011, at 7:09 AM, André Fachat wrote:
>> >>
>> >>>
>> >>>
>> >>>> Excellent analysis!
>> >>>
>> >>> Thanks, that was a tricky one. I missed the important point only
>> >>> until
>> I realized that the 74100 actually does NOT store the lowest two bits
>> because it handles the upper 8 bits and not the lowest 8 bits of the 10
>> bit
>> video memory address.
>> >>>
>> >>> I only hope it helps. I'm looking forward to the 'scope analysis.
>> >>>
>> >>> André
>> >>>
>> >>> -- 
>> >>> NEU: FreePhone - kostenlos mobil telefonieren!
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>> >>>
>> >>>     Message was sent through the cbm-hackers mailing list
>> >>
>> >
>> >
>> >       Message was sent through the cbm-hackers mailing list
>>
>>
>>        Message was sent through the cbm-hackers mailing list
>
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Received on 2011-05-22 16:00:20

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