Hello, > I can post a disassembly if you want. Please. Do you want to post it on your blog? > At $0810 on 6509 side is the jump table to IPC routines. Yes, i've found that address in the rom listing. But not all addresses are usable. So i think it starts at $0828 or with ipc command $0c. > There are some things I don't > understand, for example some strange stuff at $0600-$07FF. You mean the $f0f0 and $0f0f? >> At a look at the rom listing CBM-II there are some different causes >> for the ipc server at the 6509. Only if the highest bit at the ipc >> command is set to one the dram bus is arbitrated, the function >> called and after them released. When an ipc call without this bit is >> called, the 6509 can't access the dram at bank 1 and can't owerwrite >> the address 10021h. > > That's one of the reasons I believe it is overwritten on the 8088 > side. What is your ipc command code for reading a sector from disk? I don't find command with highest bit set. So no command has access to dram. That must be false! > It would be much easier for the 8088 to do it, just set DS to > zero and write to byte 0021h. That's simple, but who do it? > On a side note, 21h is the port number used to pass IPC data to the > 6509. Coincidentally, the momory location of the same address gets > overwritten. But the 8088 has two address spaces. One for memory (dram) and the other for io (ports). And why is the difference between high and low profile? So is think it must be on the 6509 side or around the dram! > I made one error here. INT 08h is used only to cold-start the loader. Okay, if the address 0000:0021 is overwritten the system must running after starting up. > Then it is not used because 6509 is not calling 8088 for anything, > only the other way around. No! The ipc code ends in a endlees jump loop. The 8088 do it when the dram bus is give up. The only way out of this loop is an irq. So i think the 6509 triggers the 8088 over an interrupt. >> * Pin PC7 (Pin# 32) is at the low profile connected to ground, at >> the high profile over a resistor to VCC. > > What about the dot clock? The dot clock is the same, 18Mhz! > The 720 screen is 350 pixels high, but 610 > screen is only 200. Yes, there are three table for the crtc init. The routine crtint at $fe260 loads the y register with * $11 14 raster lines * $23 8 raster lines NTSC 60Hz * $35 8 raster lines PAL 50Hz and count by $11 reverse to init the crtc. The base address of the init table is $fec6f. The condition for the choise of the y register are the io pins PC6 and PC7 (see above) of the TPI #2 for the keyboard. > Is there any difference in clock generation to > reflect this? No! I don't find any! Greetings Martin Message was sent through the cbm-hackers mailing listReceived on 2011-01-23 23:00:07
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