RE: visual 6502 simulation...

From: Bil Herd <bherd_at_mercury-cg.com>
Date: Thu, 16 Sep 2010 11:59:02 -0400
Message-ID: <23312c09282608bc4f773b6ea56fbc2c@mail.gmail.com>
Just forwarded to Chuck Peddle
Bil

-----Original Message-----
From: owner-cbm-hackers@musoftware.de
[mailto:owner-cbm-hackers@musoftware.de] On Behalf Of "André Fachat"
Sent: Thursday, September 16, 2010 4:39 AM
To: cbm-hackers@musoftware.de
Subject: visual 6502 simulation...


In case you haven't noticed, some brilliant guys have analyzed the 6502.
From microscopic images of the chip they built a netlist and a simulator to
actually run the chip, from this netlist!

http://www.visual6502.org/

This allows to actually analyze all the peculiarities, for example why an
interrupt during a taken branch is delayed by an instruction.
http://forum.6502.org/viewtopic.php?t=1634 - might be worth looking into
that for the Commodore emulators...

I voted for the 6522 as next chip to analyze, to find out about the shift
register bug. But if you're willing to donate some 6526, they might open
this one and we finally find out how the timers work....

André

--
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Received on 2010-09-16 15:59:02

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