RE: 6809 assembly knowledge needed

From: ruud.baltissen_at_apg.nl
Date: Fri, 5 Feb 2010 08:25:15 +0100
Message-ID: <3FAF2D74FB701448B997B2CB7A0076C20F4C1030@winsv116.office01.internalcorp.net>
Hallo Rainer,
 

> Btw., if there are special feature requests or ideas for
> improvement regarding future versions of GODIL, let me know
> and I'll happily forward it to Mike Randelzhofer,

A "GODIL for dummies" book. And I'm not kidding. This device looks good
enough for the ideas I have. Although I'm an engineer, I date way back
from the 5V TTL-age. It is if you introduce a stone-age man into the
iron-age; he will recognise an axe when he sees it and he will know ho
to uses the device, but how to make one himself is a different question.

In my case I had problems with the different voltages but if I
understand Nate correctly, the device can be ordered with levelshifter
IC's so I don't need the buffers I proposed at all. But I never
programmed an FPGA, only a CPLD once. Some guidance would be fine. It
does not have to contain a course in VHDL or Verilog but examples would
be welcome, just to make you familiar with the device and special
features like timers or what so ever.

About ideas, one idea I have for ages is a SCPU-alike replacement for
the 6510. Having 48 pins, the 6510 only needing 38, means we have 48 for
our own purposes. Just brainstorming:
- another 8 for the extra address lines
- one for telling the C64 to do nothing
- one free
The Godil is connected to the C64 through buffers. The moment the CPU
goes beyond the 64 KB border the extra line tristates the buffers
(including one for the R/W line). Resistors pull the busses (H). The C64
no believes the CPU is reading address $FFFF, IMHO a save escape
address. As the GODIL cannot disturb the VIC in any way, the extra line
can also disable the RDY and AEC signal towards the GODIL. In this state
it can even run at an higher clock speed. 

My personal interest: I want to use the extra address space to connect
PC-ISA cards (and later, if I find out how, PCI cards). I can use the
last extra pin to tell the ISA-card whether it is an I/O or an memory
operation. But not needing 16 MB, I could do with just 1 MB and having
another 4 pins for future use.

The ISA-card brings me to another possible improvement for the GODIL:
extra I/O pins. At least four extra would enable me to use the 16-bits
databus of the ISA-card in an easier way. But this is sheer personal
interest (read: leziness) :)


--
     ___
    / __|__
   / /  |_/     Groetjes, Ruud
   \ \__|_\
    \___|       URL: Ruud.C64.org


 







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