RE: Hi-res on the PET

From: Didier Derny <>
Date: Tue, 22 Dec 2009 22:40:15 +0100
Message-ID: <000601ca834f$59925de0$0cb719a0$@org>

Is it the board, with 2 graphic banks low res, or 1 high res but shaky...  ?
It it's this board it was extremely slow

And as far as I can remember it was incompatible with the 64k board
Without some "electric tweaking"...


-----Message d'origine-----
De : [] De la part de Rhialto
Envoyé : mardi 22 décembre 2009 22:29
À :
Objet : Hi-res on the PET

Thanks to a bunch of disk images that must have been made by Ruud
(thanks!) [2], I came across some demo programs for a hi-res board for
the PET. Then I remembered that I had some vague and confusing notes
about its use, which I got when we had one on loan at the school's
computer club (assuming the boards to be the same).

Putting 1 and 1 together, the programs seemed to match the notes, and so
with the help from the notes, and the realisation that the notes implied
there was a PIA in the mix, I started to implement an emulation in VICE.
First I got it working as a weird memory expansion, then with the help
from the #vice-dev irc channel, I hooked it into graphics output. It was
nearly working[4] on the first try :-) [5][6]

So now this is in the svn version of VICE, and here[3] is a patch you
can probably apply to 2.2 (which has just been released).

Here are my notes:

The DWW hires board[1] has a PIA at address 60200 = $EB28

It seems that in the demo programs, the BASIC versions like to
POKE in 60200, where the machine language programs use $EB00.

60200 Port A or DDR A
$EBx0 1  0 \
      2  1 - RAM block at $EC00 (0-7)
      4  2 /
      8  3 charrom         0 = off 1 = on
      16 4 hires           0 = on  1 = off
      32 5 extra charrom   0 = on

60201 Control Register A: bit #3 (worth 4) controls if 60200
$EBx1 accesses the Data Direction Register A (0) or Port A (1).

60202 Port B or DDR B
$EBx2 0 = RAM is visible from $9000 - $AFFF
      1 = RAM is bank-switched in blocks of 1 K in $EC00 - $EFFF

      [Control Register B is never mentioned, so putting 1 in this
       address would access the DDR, creating an output line, which
       after RESET is default 0...]

Typical initialisation sequence:

    poke 60201,0	poke 60200,255		(all outputs)
    poke 60201,4	poke 60200,24 or 25 (16 + 8 + 1)

Demo programs on disk PBE-110A, 110B, 111A, and 111B.
These disks can be found inside
(PBE = PET Benelux Exchange, the Dutch PET user group)

The memory mapping is a bit strange. It seems each 1 K block contains
the pixeldata for 1 bit-line of each text line. This is probably so that
the addressing of the RAM can borrow part of the addressing
logic/signals of the text screen. (The screen addressing cycles through
0-39, then increases the line (= byte offset) which is fetched from
the character ROM; for the graphics, the screen position selects the
byte in a KB and the char ROM offset selects which KB of graphics RAM).

My notes say: to set a pixel:

RE = INT(Y/8): LY = Y - 8*RE	(or Y AND 7)
BY = INT(X/8): BI = X - 8*BY	(or X AND 7)

when memory mapped to $9000:

    L = 36864 + 1024 * LY + 40 * RE + BY

when memory mapped to $EC00:

    POKE 60200,LY + 40 (or 8?)
    L = 60416 + RE * 40 + BY

[1] Dubbel-W bord, designed by Ben de Winter and Pieter Wolvekamp


___ Olaf 'Rhialto' Seibert    -- You author it, and I'll reader it.
\X/ rhialto/at/      -- Cetero censeo "authored" delendum esse.

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Received on 2009-12-22 22:00:32

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