Reverse Engineering WarpSpeed

From: Jim Brain (
Date: 2008-11-22 05:59:51

I was working on creating a schematic for the WarpSpeed cart, and I am 
struggling to figure out how the cart works.  My schematic is at:

I've placed the original pictures I received in the dir as well.  Since 
the original bare PCB scans were not great, I've asked for someone to 
mail me a PCB so I can scan it.

That said, I don't understand the 74LS109 operation.  Any thoughts are 
appreciated.  I don't need to know per se, but I am very curious.

On the reverse engineering, the designer did a bit of obfuscation in 
order to make board layout easier.  The ROM is a 16kB one, with data 
lines and address lines crossed.

64   ROM
A0   A0
A1   A1
A2   A10
A3   A2
A4   A3
A5   A11
A6   A4
A7   A9
A8   A5
A9   A8
A10   A6
A11   A7
A12   A13
A13   A12

D0   D3
D1   D2
D2   D4
D3   D1
D4   D0
D5   D5
D6   D6
D7   D7


Jim Brain, Brain Innovations                                      (X) 
Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times! 

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