Re: (Fwd) RE: 1541IDE and 1541IDE-S

From: Jim Brain (
Date: 2007-12-11 21:56:55 wrote:
> On 2007-12-10, at 23:54, Jim Brain wrote:
>> Ruud sent me his schematics, and I am fiddling with them.
>> However, I didn't get any emails on my offer to design and buy some 
>> etched boards.
>> Just thought I'd check.
> I could do it myself but if you're going to have some available - I'll 
> buy from you.
>>   If no one is interested, I thought I might see if I could extend 
>> the design to do 16 bit transfers without too many more ICs.
> Sure! That's a very natural (and good) extension of Ruud's idea.
I believe I have a design that retains source compatibility with Ruud's 
project, but it'd be nice if others could look the logic over and verify 
it, since I don't do 6502 interfacing projects a lot.

The changes I made were:

    * I mapped the IDE to A4,A3,A2,A1 (instead of Ruud's A3,A2,A1,A0)
      leaving A0 as the hi/lo byte select
    * I added another '139, half of which is used to further constrain
      the onboard CS line so that the IDE lines are only active when A0
      is low.
    * I added 2 '573s, in both directions, used as a staging area for
      the hi byte of the IDE databus
    * The other half of the '139 is used to select one of 4 operations
      for the '573s:
          o During Read and A0 is low, we are reading from IDE, so store
            hi byte in 573
          o During Write and A0 is low, we are sending to IDE, so output
            hi byte on IDE bus
          o During Read and A0 high, we are reading from 573, so output
            573 on 6502 bus
          o During Write and A0 high, we are writing to 573, so store
            data into 573
    * I used a 74LS02 to constrain CLK lines into the 573s with Phi2.
    * Due to this design, order of access is very important.  Reads must
      always start with low byte, writes must always start with hi byte.
    * Finished board fits on 2.6" by 3.6". and 9 will fit on an 8x11 panel.
    * If additional '139, '02, and '573s are not populated, circuit
      approximates Ruud's original (addresses being shifted)

Total circuit takes 7 ICs (244,245,139,139,573,573,02), an IDE 
connector, and a half dozen passives. 

As always, comments and help appreciated.  If people can either verify 
my design would work, (or verify that it won't, so I'll need to use 
Ruud's original design), I can probably spin the boards this week.  
Christmas presents for folks.


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