Re: Adapting EPROM/SRAM to replace 6540/6550...

From: Ethan Dicks (
Date: 2007-01-23 10:18:40

On 1/23/07, William Levak <> wrote:
> On Mon, 22 Jan 2007, Bryan Pope wrote:
> >       According to
> > ,
> > it sounds like it should be fairly easy to adapt say a 2716 or 2764
> > EPROM to replace a 6540 ROM and a 2114 SRAM to replace a 6550 RAM.
> >
> >       To do this would I wire all of the Chip Selects together and
> > then connect them to the Output Enable on the EPROM/SRAM?
> CS1 and CS2 are connected to +5V.  CS5 is connected to ground.  These
> three can be ignored.  CS4 is the bank select and is the only required
> select.  CS3 is actually A11.

Handy to know - my answer was based on a number of memory select
schemes contemporary with the 4K/8K PET - I should probably have
checked the PET schematic before posting such a complicated answer.
Please do modify my answer to allow ignoring any chip selects that are
tied high or low - those obviously don't factor into any specific
select logic (though they can be and were used to keep the part count
low for memory select schemes in a number of late 1970s designs).

Important to note that CS1 and CS2 are tied high and CS5 is tied low -
if there aren't any resistors on CS1 and CS2, tying them to CS5 then
to the CS pin on a replacement ROM would be *bad* (i.e. - shorting +5
and GND).  The power supply wouldn't like that much.

> It is easier to replace the two 2K ROMs in the same bank with one 4K
> EPROM.  This can be placed in either of the 2 original sockets.

I take it that's because CS3 is really A11?

> Pin 16 is the phi 2 timing signal.  I think it can be ignored.  The 2316Bs
> do not use it.
> >       Also, what is pin 16 on the 6540 ROM for?  It is labeled "02"

Sounds handy - I wasn't sure about its use on the old EPROMs and
thought it might have been some sort of output enable (/OE) or chip
select to prevent the ROM from sticking data on the bus when the 6502
wasn't on the right phase to want it.


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