From: Gábor Lénárt (lgb_at_lgb.hu)
Date: 2005-10-11 12:53:54
Hello, I think it's quite compilcated to work with refresh in this case. I've tried to use SRAM module, which is much easy, since you haven't need refresh :) Also with a little battery it's possible to use SRAM as some storage, because in stand-by mode it won't forget content with using only a very low current from the battery. And nowdays SRAM is not expensive at least ... It's not too hard to replace 6510 CPU with some 65816, and all of the SRAM can be addressed directly by 65816 "mapped" above the base 64K (which is the internal memory map of the base c64 of course). At least I had a plan to do this, but I hadn't got enough time ever ;-( I had also plans to think about clock 65816 faster than the original clock of C64's 6510 with using some "wait states" when generating addresses to the first 64K of memory (C64's original memmap) to much with the original timing of the 6510. But when addressing "above" 64K, these wait states can be avoided, so it would be faster (also the bus timing can be relaxed, even VIC cycles should not disturb the CPU when addressing memory above 64K, since it's the SRAM which should be done through an "internal" bus which only connects the SRAM with the CPU and nothing to do with eg VIC. sure it would require some additional stuffs to do it). Is it a very crazy idea, or can it be done at least? -- - Gábor Message was sent through the cbm-hackers mailing list
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