From: Jim Brain (brain_at_jbrain.com)
Date: 2005-06-29 08:37:40
Before the LUCKI EXPO, I hinted at a project I'd been working on, and
promised more details after EXPO.
Belatedly, here is that information, although many may have already seen
information in c.s.c.
The project is called u (Micro) IEC. It's a minimal IC CF/IDE
interface that supports the IEC bus.
It's rather like IECATA, with a few differences:
It does not need the buffer ICs in that design
It offers CF support (though that is easy to add to IECATA)
It does not require external RAM (though the newer version will support
up to 64kB of external RAM, like the IECATA)
It supports the increased speed of the JiffyDOS fastloader, and the
newer design will support parallel speeders, like RapiDOS.
Probably the main difference is in filesystem support.
uIEC supports FAT16 and FAT32 filesystems, and supports the VFAT
extensions (Long File Name support).
The idea was to build something that would allow me to transfer large
amounts of data between the PC and my CBM very quickly, and provide a
small form factor drive for the C64DTV hackers.
I took the v1 design to LUCKI, which was a Atmel ATMEGA32 single IC
design. Response was very positive. At the time, I knew I needed to
move to a M64 or M128, as the v1 design can only support 1 open file.
However, at EXPO, a number of folks suggested features and asked for
additional items, like D64 image support, etc.
Thus, after EXPO, I migrated the design to a larger CPU (with 4kB of
internal RAM, which can support 5 open files), and also added optional
external RAM for those who want to utilize the design as a CMD-HD like
peripheral (with 30 command buffers, etc.)
I believe I am pretty much done with the board layout, though I continue
to tweak it. I was able to stuff the CPU, latch, RAM, IDE, CF, 16 pin
parallel connector, 18 pin IO connector, and IEC port into 2.5" square.
Initial testing looks very good. 202 blocks load via JiffyDOS in 4.4s
from a CF card, and I believe I have made the design hot swappable.
I do need to make a web page for the design as yet, but I did put some
pictures online at:
http://www.jbrain.com/vicug/gallery/uIEC
As soon as I am comfortable with the board, I plan to get a couple made
and rework the firmware to support the expanded design. The board was
by far the hardest I have placed and routed, so I suspect there are yet
some errors in the design.
As always, project will be under GPL, though I have not yet released
anything.
Jim
--
Jim Brain, Brain Innovations
brain@jbrain.com http://www.jbrain.com
Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times!
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