From: fachat (afachat_at_gmx.de)
Date: 2005-05-16 22:36:31
On Mon, May 16, 2005 at 07:22:48PM +0200, Spiro Trikaliotis wrote:
> Changing some parts around, it seems it is the drive MECHANICS which is
> the culprit. Even more interestingly, there are drives where using
> side 0 (lower R/W head) causes this behaviour, but using side 1 (upper
> R/W head) does not cause this behaviour!
I have not experienced this but could this be because of a delay of the
data signal in the mechanics? Assume the signal gets a delay of the
multiple of half the bit time (i.e. half the time it needs to write a
GCR bit) both when reading and when writing.
Now write a bit, and change from write to read. Because of the delay,
(half a bit in and half a bit out) the borders of the bits on the medium
are received whithout a phase shift when reading.
If the drive mechanics delays the bits the fourth part of a bit, then
when reading the bit results in a phase shift of half a bit.
So the mechanism to identify the bit values has the problem of
finding the value because it has to decide which bit to take.
I don't really know how the analog circuitry works, maybe that
problem does not occur in normal operation, because the SYNC
signal syncs the bit-value-identifier as well?
Do you get what I mean?
Andre
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