From: Baltissen, GJPAA (Ruud) (ruud.baltissen_at_abp.nl)
Date: 2005-04-19 14:26:53
Hallo allemaal,
> maybe Ruud Baltissen can be asked about the gory technical details)
It is always said that, theoretically, all C64 version should behave the
same. But I also found out that the CP/M cart isn't accepted by all C64's.
The only official differences I know of is that the behaviour of the VIC
chip can be different for some versions.
I had a look at my own SCH (schematics-big.gif) and at the one of Jerzy
Sobola, Z80.GIF. The last one contains several severe errors and I discarded
it. My own one contains an error as well: the inputs towards the inputs of
U2b and U2f must be swapped.
I noticed this difference because I do have some suspicions regarding DOT
and CLK. DOT is 8 times CLK and that is the only official relation. Nothing
is said about the timing or the phase between these signals. And I can
imagine a situation where this can be very important.
First I assume that PHI2 changes level at the falling edge of DOT.
_ _ _ _ _ _ _ _ _ _ _ _
DOT: _| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_
___ ___ ___ ___ ___ ___
4 MHz: ___| |___| |___| |___| |___| |___| |_
_______ _______ _______
2 MHz: _______| |_______| |_______| |_
_______________ _
PHI2: _______________| |_______________|
The CLK-input of U1b, a 7474 flipflop is fed by DOT through U2b. U1b reacts
on the rising edge of CLK ie. the falling edge of DOT. The above figure
shows the relation between DOT and PHI2 if PHI2 was generated by a 74LS393
divider for example.
But PHI2=(H) will set the /Q output of U1b with the following result:
___ ___________________ ___ ___
Z80: ___| |___| |___| |___| |_
_______________ _
PHI2: _______________| |_______________|
Now assume there is a delay between the raising edge of the DOT and PHI2
then this could happen:
___ ___ _____________ ___ ___
Z80: ___| |___| |_| |___| |___| |_
_____________ _
PHI2: _________________| |_______________|
^
This is ASCII and dip marked by '^' is only nanoseconds. But this could be
enough to mess up the internal processes of the Z80 causing it to crash. And
I know another hypothetical situation were this could happen as well.
I hope the above was clear, otherwise feel free to ask me for more details
or a better explanation.
As said before: nothing is said about the timing or the phase between these
signals. But a fact is that version A and B have this 3-IC oscilator circuit
while the newer versions use the 8701. My favourite C64 is a B and has no
problems with the cart.
Summary: I suspect the relation between DOT and PHI2 is the reason for a
(not) working CP/M cart.
--
___
/ __|__
/ / |_/ Groetjes, Ruud
\ \__|_\
\___| URL: Ruud.C64.org
=====DISCLAIMER=================================================================
De informatie in dit e-mailbericht is vertrouwelijk en uitsluitend bestemd voor de geadresseerde. Wanneer u dit bericht per abuis ontvangt, verzoeken wij u contact op te nemen met de afzender per kerende e-mail. Verder verzoeken wij u in dat geval dit e-mailbericht te vernietigen en de inhoud ervan aan niemand openbaar te maken. Wij aanvaarden geen aansprakelijkheid voor onjuiste, onvolledige dan wel ontijdige overbrenging van de inhoud van een verzonden e-mailbericht, noch voor daarbij overgebrachte virussen.
The information contained in this e-mail is confidential and may be privileged. It may be read, copied and used only by the intended recipient. If you have received it in error, please contact the sender immediately by return e-mail; please delete in this case the e-mail and do not disclose its contents to any person. We don't accept liability for any errors, omissions, delays of receipt or viruses in the contents of this message which arise as a result of e-mail transmission.
Message was sent through the cbm-hackers mailing list
Archive generated by hypermail pre-2.1.8.