On Fri, 30 Jul 1999, Larry Anderson wrote: > > Jim Butterfield's book "Machine Language Programming for Commodore > > Computers" (think that's right) has memory maps and information on the TED > > chip. > > I have that one too, it has some I/O mapping but no pinout (which is important > since the 8 data lines are not in sequence or on just the bottom row! I think > the document on Plus/4 I/O is called +4/16io.doc that's how I have it on the > Mac here.. Quoting from an email I sent to Marko, here are the lines on the plus/4's user port that are of interest: B P0 K P1 4 P2 5 P3 6 P4 7 P5 J P6 F P7 E DTR D RTS H DCD L DSR The first eight are an 8 bit parallel port which unfortunately doesn't have a data direction register. If you write to it, whichever bits are 0 get pulled low. If you read from it, the voltage at each pin determines the logic level, whether that was caused by external devices pulling the line low or the internal output drivers. At least, that's my understanding of the operation of the 6529. The next two are RS232 handshake outputs that can be directly controlled by the processor. Data Terminal ready is bit 0 of the 6551 Command Register and Ready To Send is controlled by bits 2 and 3 of the Command Register, although it's effectively bit 3. The last two are RS232 handshake inputs that can be directly read by the processor. Data Carrier Detect is bit 5 of the Status Register and Data Set Ready is bit 6 of the Status Register. Although both of these are inputs to the interrupt logic of the 6551 (according to the datasheet in /documents/chipdata/6551.zip) I have not been able to work out how they can be programmed to cause interrupts. Does prlink use FLAG2 and CB1 in interrupt mode? Well I'm off on holiday for a week, will have internet access but shouldn't use it much as it'll be on expensive 33.6k dialup :( Richard - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail firstname.lastname@example.org.
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