On Fri, 23 Apr 1999, William Levak wrote: > Four sprites on the same line cause the disk drive to hang up when > loading. > > They can be the first four, the last four, or every other one, it doesn't > make any difference. Actually 2 or 3 sprites should be enough, if they are not successive ones. As you can see from the timing diagrams in the document <URL:http://www.funet.fi/pub/cbm/documents/chipdata/VIC-Article.gz>, the timing of a bad line without sprites will be like this: rrrrrXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX++0-1-2-3-4-5-6-7-rrrrr The diagram is for the 6569. On the 6567R56A, replace "++" with "++++". On 6567R8 and later, replace it with "+++++". The BA line will be made inactive 3 cycles before the DMA takes place. That'll happen after the 2nd "r" (refresh cycle) on the left. If sprite 0 is active, the processor won't get any cycles after the character fetch on PAL systems (the 40 cycles marked with X), or it'll get 1 or 2 cycles on NTSC systems. Considering the 3-cycle rule, it won't make any difference whether you have sprites 0..3 active, or just sprites 0,2,3 or 0,1,3: the processor won't get any time unless the DMA will pause for longer than 3 cycles. I think that activating e.g. the sprites 0,2,4 or maybe even 0,3 should hang the protocol. Marko - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail email@example.com.
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