TED refresh c.

From: Levente Harsfalvi (levente.h_at_usa.net)
Date: 1998-03-06 00:12:12


> BTW, does anyone know the memory addresses the TED reads while refreshing
> memory? The VIC-II and the VIC-IIe read $3F00-$3FFF.
> Marko

Suppose, $ff00-$ffff.

Though, I did no measurements. But what I'm sure of, the TED reads bitmask
data from $ffff in idle cycles.

(I'd better say 'idle cycles which happen while single clock cycles'. Single
clock cycles are similar to VIC-II's behavior; thus, TED has the bus in the
half of all cycles whether it needs this or not. Twiee clock cycles, which
should be the same as VIC-IIe acts in 2Mhz mode (...anybody of you should
confirm this, I have no C-128) are a bit different, as these happen when the
TED definitely doesn't need the bus, ie. when the beam is on the borders _and_
no memory refresh is currently running. After some fiddling with opening the
bottom border with the usual $d011 trick (=$ff06 in the TED) I suppose the TED
still does read during these but it's address output lines should be set to

Since TED has all 16 address lines (VIC-II had less a lot, 14), and thus it
can address all memory locations directly (it can even differentiate between
ROM and RAM on the $8000-$ffff area by itselves!), and if VIC-II did read from
the last 256 locations of its address area, and if another issue (the idle
mode read) confirmed this 'last address' behaviour, I suppose, TED should do
so with the memory refresh cycles either.

But well, eh, may the Big Digital Logic Analyzer be with you :-)


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